The present invention relates to a method of manufacturing a semiconductor device and it is suited for use, for example, in a method of manufacturing a semiconductor device having a nonvolatile memory.
As an electrically writable/erasable nonvolatile semiconductor memory device, an EEPROM (electrically erasable and programmable read only memory) has been used widely. Such widely used memory devices typified by a flash memory have, below a gate electrode of a MISFET thereof, a conductive floating gate electrode or a trapping insulating film surrounded by an oxide film. Charges are stored in the floating gate electrode or trapping insulating film as memory information and are read as the threshold value of the transistor. The trapping insulating film is a film capable of storing therein charges and a silicon nitride film is one example of it. The threshold value of the MISFET is shifted by injection/emission of charges to/from a charge storage region and thus, it is operated as a memory element. As an example of this flash memory, a split-gate type cell using a MONOS (metal-oxide-nitride-oxide-oxide-semiconductor) film can be given. Such a memory using a silicon nitride film as a charge storage region is superior in reliability of data retention to a conductive floating gate film because it can store charges discretely. Another advantage is that due to superiority in reliability of data retention, an oxide film above or below the silicon nitride film can be thinned and write/erase operation can be performed at a reduced voltage.
Japanese Unexamined Patent Application Publication No. 2007-258497 (Patent Document 1) and Japanese Unexamined Patent Application Publication No. 2008-211016 (Patent Document 2) describe a technology about a nonvolatile semiconductor memory device.    [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2007-258497    [Patent Document 2] Japanese Unexamined Patent Application Publication No. 2008-211016